Members

Breaking News

This website provides you the notes ,Books PDF and previous year papers of B.Sc and MSc Physics

"Digital Principle and Applications" Book free download pdf by A.P. Malvino and Donald P. Leach, Tata McGraw Hill Company

 "Digital Principle and Applications" Book free download pdf by A.P. Malvino and Donald P. Leach, Tata McGraw Hill Company


"Digital Principle and Applications" Book free download pdf by A.P. Malvino and Donald P. Leach, Tata McGraw Hill Company,
"Digital Principle and Applications" 

Contents :- 


1. Digital Principles
Contents
1.1 Definitions for Digital Signals 2
1.2 Digital Waveforms 4
1.3 Digital Logic 8
1.4 Moving and Storing Digital Infom1ation 13
1.5 Digital Operations 17
1.6 Digital Computers 22
1.7 Digital Integrated Circuits 26
1.8 Digital IC Signal Levels 32
Summmy 35
Glossary 35
Problems 36
2. Digital Logic
2.1 The Basic Gates-NOT, OR, AND 40
2.2 Universal Logic Gates-NOR, NAND 48
2.3 AND-OR-Invert Gates 57
2.4 Positive and Negative Logic 59
2.5 Introduction to HDL 61
Summary 68
Glossary 69
Problems 69
Laborat01y Experiment 7 3
3. Combinational Logic Circuits
3.1 Boolean Laws and Theorems 75
3.2 Sum-of-Products Method 81
3.3 Truth Table to Kamaugh Map 84
3.4 Pairs, Quads, and Octets 86
3.5 Kamaugh Simplifications 89
3.6 Don't-care Conditions 93
3.7 Product-of-sums Method 95
3.8 Product-of-sums Simplification 98
3.9 Simplification by Quine-McClusky Method 102
3 .1 0 Hazards and Hazard Covers 104
3.11 HDL Implementation Models 108
Contents
Problem Solving with Multiple Methods 110
Summary 111
Glossary 112
Problems 112
Laboratory Experiment 116
4. Data-Processing Circuits
4.1 Multiplexers 118
4.2 Demultiplexers 127
4.3 1-of-16 Decoder 130
4.4 BCD-to-decimal Decoders 133
4.5 Seven-segment Decoders 136
4.6 Encoders 138
4.7 Exclusive-OR Gates 141
4.8 Parity Generators and Checkers 143
4.9 Magnitude Comparator 146
4.10 Read-only Memory 148
4.11 Programmable Array Logic 154
4.12 Programmable Logic Arrays 156
4.13 Troubleshooting with a Logic Probe 158
4.14 HDL Implementation of Data Processing Circuits 159
Problem Solving with Multiple Methods 161
Summary 163
Glossary 163
Problems 164
Laboratory Experiment 169
5. Number Systems and Codes
5 .1 Binary Number System 171
5 .2 Binary-to-decimal Conversion 17 3
5 .3 Decimal-to-binary Conversion 17 6
5.4 Octal Numbers 179
5.5 Hexadecimal Numbers 183
5.6 The ASCII Code 190
5.7 The Excess-3 Code 192
5.8 The Gray Code 193
5.9 Troubleshooting with a Logic Pulser 194
5 .10 Error Detection and Correction 196
Problem Solving with Multiple Methods 198
Summary 199
Glossary 200
Problems 200
Laboratory Experiment 205

6. Arithmetic Circuits 
6.1 Binary Addition 207 
6.2 Binary Subtraction 211 
6.3 Unsigned Binary Numbers 212 
6.4 Sign-magnitude Numbers 214 
6.5 2's Complement Representation 216 
6.6 2's Complement Arithmetic 220 
6.7 Arithmetic Building Blocks 226 
6.8 The Adder-subtracter 228 
6.9 FastAdder 232 
6.10 Arithmetic Logic Unit 235 
6.11 Binary Multiplication and Division 237 
6.12 Arithmetic Circuits Using HDL 237 
Problem Solving with Multiple Methods 239 
Summary 240 
Glossary 241 
Problems 241 
Laboratory Experiment 243 
206 
7. Clocks and Timing Circuits 244 
7.1 Clock Waveforms 244 
7.2 TTL Clock 249 
7.3 Schmitt Trigger 250 
7.4 555 Timer-Astable 253 
7.5 555 Timer-Monostable 256 
7.6 Monostables with Input Logic 258 
7.7 Pulse-forming Circuits 262 
Problem Solving with Multiple Methods 264 
Summa,y 265 
Glossary 266 
Problems 266 
Laborato,y Experiment 268 
8. Flip-Flops 270 
8.1 RS FLIP-FLOPs 271 
8.2 Gated FLIP-FLOPs 276 
8.3 Edge-triggered RS FLIP-FLOPs 279 
8.4 Edge-triggered D FLIP-FLOPs 281 
8.5 Edge-triggered JK FLIP-FLOPs 283 
8.6 FLIP-FLOP Timing 285 
8.7 Edge Triggering through Input Lock Out 286 
8.8 JK Master-slave FLIP-FLOPs 288 
8.9 Switch Contact Bounce Circuits 289 
8.10 Various Representations of FLIP-FLOPs 290 
8.11 Analysis of Sequential Circuits 293
8.12 Conversion ofFLIP-FLOPs: A Synthesis Example 296 
8.13 HDL Implementation of FLIP-FLOP 298 
Problem Solving with Multiple Methods 301 
Summa;y 303 
GlossaTJ' 303 
Problems 304 
Laborat01y Etperiment 306 
9. Registers 
9.1 Types of Registers 309 
9 .2 Serial In-serial Out 310 
9.3 Serial In-parallel Out 313 
9 .4 Parallel In-serial Out 316 
9.5 Parallel In-parallel Out 320 
9.6 Universal Shift Register 324 
9.7 Applications of Shift Registers 325 
9.8 Register Implementation in HDL 333 
Problem Solving with Multiple Methods 334 
Summmy 335 
Glossmy 336 
Problen1s 336 
Laborat01y Experiment 339 
10. Counters 
10.1 Asynchronous Counters 342 
10.2 Decoding Gates 346 
10.3 Synchronous Counters 349 
10.4 Changing the Counter Modulus 357 
10.5 Decade Counters 363 
10.6 Presettable Counters 368 
10.7 Counter Design as a Synthesis Problem 376 
10.8 A Digital Clock 381 
10.9 Counter Design using HDL 384 
Problem Solving with Multiple Methods 386 
Summary 387 
Glossary 388 
Problems 388 
Laboratmy Experiment 390 
11. Design of Synchronous and Asynchronous Sequential Circuits 
PART A: Design of Synchronous Sequential Circuit 393 
11.1 Model Selection 393 
11.2 State Transition Diagram 394 
11.3 State Synthesis Table 396 
11.4 Design Equations and Circuit Diagram 398 
11.5 Implementation using Read Only Memory 400

11.6 Algorithmic State Machine 404 
11. 7 State Reduction Technique 409 
PART B: Asynchronous Sequential Circuit 413 
11. 8 Analysis of Asynchronous Sequential Circuit 414 
11.9 Problems with Asynchronous Sequential Circuits 417 
11.10 Design of Asynchronous Sequential Circuit 419 
11.11 FSM Implementation in HDL 423 
Problem Solving with Multiple Methods 425 
Summary 432 
Glossary 432 
Problems 433 
Laboratory Experiment 435 
12. D/ A Coversion and AID Conversion 438 
12.1 Variable, Resistor Networks 439 
12.2 Binary Ladders 442 
12.3 DI A Converters 447 
12.4. DI A Accuracy and Resolution 454 
12.5 AID Converter-Simultaneous Conversion 455 
12.6 AID Converter-Counter Method 458 
12.7 Continuous ND Conversion 461 
12.8 ND Techniques 464 
12.9 Dual-slope AID Conversion 467 
12.10 AID Accuracy and Resolution 471 
Summary 472 
Glossary 473 
Problems 473 
13. Memory 476 
13.1 Basic Terms and Ideas 477 
13.2 Magnetic Memory 479 
13.3 Optical Memory 483 
13.4 Memory Addressing 486 
13.5 ROMs, PROMs, and EPROMs 491 
13.6 RAMs 496 
13.7 Sequential Programmable Logic Devices 503 
13.8 Content Addressable Memory 506 
Summary 507 
Glossary 508 
Problems 509 
14. Digital Integrated Circuits 512 
14.1 Switching Circuits 513 
14.2 7400 TTL 518 
14.3 TTL Parameters 520
14.4 TTL Overview 528 
14.5 Open-collector Gates 530 
14.6 Three-state TTL Devices 532 
14.7 External Drive for TTL Loads 534 
14.8 TTL Driving External Loads 537 
14.9 74COO CMOS 538 
14.10 CMOS Characteristics 541 
14.11 TTL-to-CMOS Interface 544 
14.12 CMOS-to-TTL Interface 546 
14.13 Current Tracers 548 
Summary 550 
Glossary 551 
Problems 552 
Contents 
15. A!)piications 558 
15.l Multiplexing Displays 559 
15.2 Frequency Counters 565 
15.3 Time Measurement 570 
15.4 Using the ADC0804 571 
15.5 Microprocessor-compatible AID Converters 577 
15.6 Digital Voltmeters 585 
Summat)' 591 
Problems 591 
16. A Simple Computer Design 
16.1 Building Blocks 594 
16.2 Register Transfer Language 597 
16.3 Execution oflnstructions, Macro and Micro Operations 599 
16.4 Design of Control Unit 602 
16.5 Programming Computer 605 
Summary 612 
Glossary 612 
Problems 613 
Appendix 1: Binary-Hexadecimal-Decimal Equivalents 615 
Appendix 2: 2's Complement Representation 621 
Appendix 3: TTL Devices 625 
Appendix 4: CMOS Devices 628 
Appendix 5: Codes 630 
Appendix 6: BCD Codes 633 
Appendix 7: Overview of IEEE Std. 91-1984, Explanation of Logic Symbols 638 
Appendix 8: Pinout Diagrams 643 
Appendix 9: Answers to Selected Odd-Numbered Problems 647 
Index

Download free book pdf 👉
                 

                Click Here


Join telegram for more update 👉🔥👉

                Join telegram  👈





No comments

Stay active on email id to see comment reply

Note: Only a member of this blog may post a comment.